Scaling an SRAM-architecture integrated with photonics can surpass HBM-based architectures on throughput/MW and TCO, and significantly outperform silicon-only SRAM-architectures in interactivity and latency.

Why it matters: the latest generation of AI models achieve breakthrough performance by using vastly more tokens to solve complex problems. As frontier models become more sophisticated, demand is compounding faster than today’s infrastructure can scale.

Even the most dominant players, with full-stack control across silicon, software, and supply chains, are unable to solve this within the existing architecture. Inherent constraints in physical design and packaging mean GPU memory architecture is incapable of simultaneously delivering high throughput and high interactivity at low cost.

Continuing AI’s advance and making it available to everyone requires a new compute paradigm. One that can overcome the fundamental limits of memory, energy, and speed that define today’s systems.